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general description the MAX14900E is an octal power switch that features per-channel configuration for high-side or push- pull operation. low propagation delay, high-rate load- switching makes the device suitable for next-generation high-speed plc systems. each high-side switch sources 850ma continuous current with a low 165m (max) on-resistance at 500ma at t a = +125c. the high-side switches feature 2s (max) input-to-output propagation delay when driving resistive loads. long cables can be driven with switching rates of up to 100khz for pwm/ppo control in push-pull operation. multiple high-side switches can be connected in parallel to achieve higher drive currents. the device features a wide supply input range of 10v to 36v. the MAX14900E is configured, monitored, and driven by an spi and/or parallel interface. in parallel mode, eight logic inputs directly control the outputs and the serial interface can be used for configuration/monitoring. serial mode utilizes the serial interface for both setting and configuration, and features crc error detection to ensure robust spi communication. current limiting and per-channel thermal shutdown protect each switch/driver. the device features a global diagnostics output as well as per-channel diagnostics and monitoring through the serial interface. the MAX14900E is available in a 48-pin (7mm x 7mm) qfn-ep or standard 48-pin tqfn-ep package, and is specified over the -40c to +125c temperature range. applications programmable logic controllers high-density digital output modules motor controllers pwm/ppo control benefts and features low power for high-density modules ? 3ma (max) total supply current ? 165m (max) high-side r on at +125c fast switching ideal for accurate, high-speed control systems ? 2s propagation delays (high-side mode) ? 0.8s propagation delays (push-pull mode) ? 100khz (max) push-pull mode switching rate extensive fault feedback eases maintenance and reduces installation time ? global and per-channel diagnostics ? open load/wire detection ? thermal shutdown fault indication ? output logic state feedback ? undervoltage lockout small packages with serial interface allows making high-density modules ? daisy-chainable spi minimizes isolation cost ? 7mm x 7mm, 48-pin qfn and tqfn packages 19-6563; rev 4; 4/15 ordering information and typical operating circuit appear at end of data sheet. functional diagram s16/in8 pgnd paralle l interfac e ol /in1 in2 crc/in 3 cerr /in4 srial in5 in6 cnfg/in7 o2 o1 fault overload open load seria l interfac e sdi clk cs sdo diagnostic s drive + monitor o8 o8 en o7 drive + monitor en o6 drive + monitor en o5 drive + monitor en o4 drive + monitor en o3 drive + monitor en drive + monitor drive + monitor pushpl v 5 fltr uv monitor v dd v dd config and setting overtemp agnd v l v 5 v l v dd rext en MAX14900E v dd v dd v dd v dd v dd v dd v dd o7 o5 o3 o1 o6 o4 o2 evaluation kit available MAX14900E octal, high-speed, industrial, high-side switch
maxim integrated 2 electrical characteristics (v dd = 10v to 36v, v 5 = 4.5v to 5.5v, v l = 2.5v to 5.5v, t a = -40c to +125c, unless otherwise noted. typical values are at v dd = 24v, v 5 = 5v, v l = 3.3v, and t a = +25c.) (note 2) note 1: package thermal resistances were obtained using the method described in jedec specification jesd51-7, using a four-layer board. for detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial . (all voltages referenced to agnd = pgnd.) v dd ........................................................................ -0.3v to +40v o_ ............................................................. -0.3v to (v dd + 0.3v) v 5 , v l , fault , in_, pushpl, fltr, srial, clk, sdi, cs , en ........................ -0.3v to +6v rext ........................................................... -0.3v to (v 5 + 0.3v) sdo ............................................................. -0.3v to (v l + 0.3v) continuous reverse current (o_) ....................................... 2.0a inductive kickback current (o_) .......................................... 1.9a continuous current (any other terminal) ...................... 100ma continuous power dissipation (t a = +70c) (derate 38.5mw/c above +70c) ............................ 4400mw operating temperature range ......................... -40c to +125c junction temperature ....................................... internally limited storage temperature range ............................ -65c to +150c lead temperature (soldering, 10s) ................................. +300c soldering temperature (reflow) ....................................... +260c stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to ab solute maximum rating conditions for extended periods may affect device reliability. package thermal characteristics (note 1) junction-to-ambient thermal resistance ( ja ) .............. 18c/w junction-to-case thermal resistance ( jc ) ..................... 1c/w absolute maximum ratings parameter symbol conditions min typ max units dc characteristics v dd supply voltage v dd 10 36 v v dd supply current i dd en = high, o_ in push-pull mode and unloaded 0.7 1.5 ma en = high, o_ in high-side mode and unloaded 0.7 1.5 v dd disable supply current i dd_dis en = low 0.7 1.5 ma v dd undervoltage-lockout threshold vdd_ uvlo v 5 = 5v, v dd rising 7.0 7.8 8.5 v v dd undervoltage-lockout hysteresis v dd_ uvhys v 5 = 5v 2.5 v v 5 supply voltage v 5 4.5 5.5 v v 5 supply current i 5 o_ in push-pull or high-side mode, cs = high, dc output 0.9 1.5 ma v 5 undervoltage-lockout threshold v 5_uvlo v dd = 24v, v 5 rising 3.8 4 4.2 v v 5 undervoltage-lockout hysteresis v 5_uvhys v dd = 24v 0.3 v v 5 por threshold v 5_por 1.6 2.4 v v l supply voltage v l 2.5 5.5 v v l supply current i l logic inputs unconnected 9 40 a v l por threshold v l_por 1.6 2.4 v MAX14900E octal, high-speed, industrial, high-side switch www.maximintegrated.com
maxim integrated 3 electrical characteristics (continued) (v dd = 10v to 36v, v 5 = 4.5v to 5.5v, v l = 2.5v to 5.5v, t a = -40c to +125c, unless otherwise noted. typical values are at v dd = 24v, v 5 = 5v, v l = 3.3v, and t a = +25c.) (note 2) parameter symbol conditions min typ max units driver outputs (o_) high-side mode on-resistance r on_hs high-side mode, en = high, o_ = high, i o_ = 500ma 85 165 m? high-side mode current limit i lim_hs high-side mode, en = high, o_ = high 1.4 1.7 2.0 a high-side mode leakage current i lkg_hs en = low, v o_ = 0v -1 +20 a push-pull mode on-resistance r on_pp push-pull mode, en = high i o_ = +50ma, o_ = high 1.6 4 ? i o_ = -50ma, o_ = low 5.2 10 push-pull current limit i lim_pp push-pull mode, en = high, during blanking time 0v < v o_ < v dd - 3v, o_ = high 200 500 ma 3v < v o_ < v dd , o_ = low 200 300 current-limit autoretry blanking time t blank push-pull mode, en = high, o_ connected to v dd or pgnd 90 s current-limit autoretry off-time t retry push-pull mode, en = high, o_ connected to v dd or pgnd 11 ms open-load detection (o_) open-load pullup current i ol high-side mode, o_ = off, 0v < v o_ < (v dd C 2v), ol detect = on 65 80 110 a open-load and status-detect threshold v tol_ en = high, ol detect = on, high-side mode, o_ = off 6.3 7 7.7 v logic inputs (in_, pushpl, fltr, srial, clk, sdi, cs, en) input logic-high voltage v ih 0.7 x v l v input logic-low voltage v il 0.3 x v l v input threshold hysteresis v ithys 0.1 x v l v input pulldown/pullup resistor r pull (note 3) 140 200 270 k? logic outputs ( fault , cerr /in4, sdo) open-drain output logic-low voltage v odl i sink = 5ma 0.33 v open-drain output leakage current i lkg_od srial = high, output not asserted, v out = 5.5v -1 +1 a sdo output logic-high voltage v oh i source = 5ma v l - 0.33 v sdo output logic-low voltage v ol i sink = 5ma 0.33 v sdo pulldown resistor r sdo cs = high 140 200 270 k? MAX14900E octal, high-speed, industrial, high-side switch www.maximintegrated.com
maxim integrated 4 electrical characteristics (continued) (v dd = 10v to 36v, v 5 = 4.5v to 5.5v, v l = 2.5v to 5.5v, t a = -40c to +125c, unless otherwise noted. typical values are at v dd = 24v, v 5 = 5v, v l = 3.3v, and t a = +25c.) (note 2) parameter symbol conditions min typ max units timing characteristics high-side mode lth output propagation delay t pdhs_lh high-side mode, delay from in_ transition (parallel mode) or cs rising-edge (serial mode) to o_ rising by 0.5v; r l = 48?, c l = 1nf, t r /t f 20ns, fltr = low, figure 1 (note 4) 0.2 1 s high-side mode htl output propagation delay t pdhs_hl high-side mode, delay from in_ transition (parallel mode) or cs rising-edge (serial mode) to o_ falling by 0.5v, r l = 48?, c l = 1nf, t r /t f 20ns, fltr = low, figure 1 (note 4) 0.9 2 s push-pull output lth propagation delay t pdpp_lh push-pull mode, delay from in_ transition (parallel mode) or cs rising-edge (serial mode) to o_ settling to within 0.8 x v dd , r l = 5k?, c l = 1nf, fltr = low, figure 2 0.3 0.7 s push-pull output htl propagation delay t pdpp_hl push-pull mode, delay from in_ transition (parallel mode) or cs rising-edge (serial mode) to o_ settling to within 0.2 x v dd , r l = 5k?, c l = 1nf, fltr = low, figure 2 0.3 0.8 s output rise and fall time t r , t f high-side mode, 20% to 80%, r l = 48?, c l = 1nf, figure 1 1.5 4 s push-pull mode, 20% to 80%, r l = 5k?, c l = 1nf, figure 2 0.1 0.4 push-pull mode, 20% to 80%, r l = 240?, v cc = 24v, c l = 1nf, figure 2 0.1 0.4 output switching rate f o push-pull mode, r l = 5k? or i l = 100ma to ground, c l = 1nf, srial = low 100 khz channel-to-channel skew t pdsk_lh , t pdsk_hl push-pull mode, figure 2 (note 5) -100 +100 ns crc error-detect propagation delay t pdl_ cerr error detected on sdi data, from cs rising-edge to cerr /in4 falling-edge; i source = 5ma, figure 3 14.5 30 ns crc error-clear propagation delay t pdh_cerr error cleared, from cs rising-edge to cerr /in4 rising, i source = 5ma, figure 3 17 40 ns pulse length of rejected glitch t gl fltr = high 0 80 ns admitted pulse length fltr = high 300 ns glitch filter propagation delay time t pdgf fltr = high 140 300 ns MAX14900E octal, high-speed, industrial, high-side switch www.maximintegrated.com
maxim integrated 5 electrical characteristics (continued) (v dd = 10v to 36v, v 5 = 4.5v to 5.5v, v l = 2.5v to 5.5v, t a = -40c to +125c, unless otherwise noted. typical values are at v dd = 24v, v 5 = 5v, v l = 3.3v, and t a = +25c.) (note 2) note 2: all units are production tested at t a = +25c. specifications over temperature are guaranteed by design. note 3: all logic input pins except cs have a pulldown resistor. cs has a pullup resistor. note 4: specifications are guaranteed by design; not production tested. note 5: channel-to-channel skew is defined as the difference in propagation delays between channels on the same device with the same polarity. note 6: bypass v dd pins to agnd with a 1f capacitor as close as possible to the device for high-esd protection. parameter symbol conditions min typ max units spi timing characteristics (figure 4) clk clock period t ch+cl 50 ns clk pulse-width high t ch 5 ns clk pulse-width low t cl 5 ns cs fall-to-clk rise time t css fltr = low (note 4) 5 ns fltr = high 300 sdi hold time t dh 5 ns sdi setup time t ds 5 ns output data propagation delay t do c l = 10pf. clk falling-edge to sdo stable 25 ns sdo rise and fall times t ft c l = 10pf 4 ns cs hold time t csh (note 4) 50 ns cs pulse-width high t cspw fltr = low (note 4) 50 ns fltr = high 280 protection specifications channel thermal-shutdown threshold t c_sd temperature rising +170 c thermal-shutdown hysteresis t c_sd_hys 15 c global thermal-shutdown threshold t g_sd temperature rising 150 c global thermal-shutdown hysteresis t g_sd_hys 10 c esd protection v esd o_ pins, human body model (note 6) 15 kv all other pins, human body model 2 MAX14900E octal, high-speed, industrial, high-side switch www.maximintegrated.com
maxim integrated 6 test circuits/timing diagrams figure 1. high-side mode timing characteristics v l agnd agnd in_ 50% 0.5v 0.5v t pdhs_lh t pdhs_lh t pdhs_hl t pdhs_hl 50% 50% 50% 80% 20% 80% 20% t r t f t r t f v dd - 0.5v v dd - 0.5v v dd v dd agnd agnd v l cs o_ o_ o_ o_ v dd v dd agnd agnd 0.1f v l v l agnd in_/cs pushpl fl tr o_ v 5 pgnd 1f v dd v dd 1f v5 c l r l 50 test source MAX14900E MAX14900E octal, high-speed, industrial, high-side switch www.maximintegrated.com
maxim integrated 7 test circuits/timing diagrams (continued) figure 2. push-pull mode timing characteristics 0.1f v l v l agnd pushpl fl tr pgnd 1f v dd v dd 50 test source MAX14900E v l agnd in_ o_ o_ t pdpp_lh t pdpp_lh t pdsk_lh t pdsk_hl t pdpp_hl t pdpp_hl 50% 50% 50% 50% t r t f t r t f 0.2 x v dd 0.2 x v dd 0.8 x v dd 0.8 x v dd 0.8 x v dd 0.2 x v dd 80% 20% v dd v dd agnd agnd v l agnd cs o_ o_ v dd v dd agnd agnd o_ v 5 1f v 5 c l r l in_/cs MAX14900E octal, high-speed, industrial, high-side switch www.maximintegrated.com
maxim integrated 8 figure 3. crc error detection timing figure 4. spi timing diagram test circuits/timing diagrams (continued) 0v 0v v l v l v l - 0.5v t pdl_cerr t pdh_ cerr 50% 0.5v 50% cs cer r /in4 cs clk sdi sdo t css t cl t ds t ft t dh t ch t do t csh MAX14900E octal, high-speed, industrial, high-side switch www.maximintegrated.com
maxim integrated 9 typical operating characteristics (v dd = +24v, v 5 = v l = 5.0v, t a = +25c, unless otherwise noted.) r on vs. v dd MAX14900E toc01 v dd (v) r on push-pull mode () r on high-side mode (m) 34 32 28 30 16 18 20 22 24 26 12 14 1 2 3 4 5 6 7 8 9 10 0 50 100 150 200 250 300 350 400 450 500 0 10 36 push-pull mode high-side fet i o = 50ma high-side mode i o = 500ma push-pull mode low-side fet i o = 50ma r on vs. temperature MAX14900E toc02 temperature (c ) r on high-side mode (m) r on push-pull mode ( ) 95 110 5 20 35 50 65 80 -25 -10 1 2 3 4 5 6 7 8 9 10 0 50 100 150 200 250 300 350 400 450 500 0 -40 125 push-pull mode high-side fet i o = 50ma high-side mode i o = 500ma push-pull mode low-side fet i o = 50ma v dd = 36v propagation delay vs. v dd MAX14900E toc03 v dd (v) propagation delay (ns) 34 32 28 30 16 18 20 22 24 26 12 14 200 400 600 800 1000 1200 1400 0 10 36 push-pull mode: r l = 5k, c l = 1nf high-side mode: r l = 48, c l = 1nf t pdpp_h l t pdpp_l h t pdhs_l h push-pull propagation dela y vs. temperatur e MAX14900E toc04 temperature (c ) propagation delay (ns) 95 110 5 20 35 50 65 80 -25 -10 -40 125 push-pull mode r l = 5k?, c l = 1nf t pdpp_hl v dd = 36v t pdpp_lh v dd = 36v t pdpp_hl v dd = 24v t pdpp_lh v dd = 24v t pdpp_hl v dd = 10v t pdpp_lh v dd = 10v 100 0 200 300 400 500 600 700 800 900 1000 high-side propagation dela y vs. temperature MAX14900E toc05 temperature (c ) high-side propagation delay (ns) 200 400 600 800 1000 1200 1400 0 push-pull mode: r l = 5k?, c l = 1nf high-side mode: r l = 48?, c l = 1nf t pdhs_l h v dd = 10v t pdhs_l h v dd = 24v t pdhs_l h v dd = 36v 95 110 52 03 55 06 58 0 -25 -10 -40 125 i dd vs. v dd MAX14900E toc06 v dd (v) i dd (ma) 34 32 28 30 16 18 20 22 24 26 12 14 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0 10 36 push-pull mode o_ unloaded i dd vs. temperature MAX14900E toc07 temperature (c ) i dd (ma) 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0 push-pull mode o_ unloaded 95 110 52 03 55 06 58 0 -25 -10 -40 125 v dd = 36v v dd = 24v v dd = 10v MAX14900E octal, high-speed, industrial, high-side switch www.maximintegrated.com
maxim integrated 10 0 1 0 2 0 3 0 4 0 5 0 6 0 7 0 8 0 9 0 0 . 0 1 0 . 1 1 1 0 1 0 0 p ow e r d i s s i p a t i on ( m w ) s w i tc h in g fr e q u e n c y ( kh z ) i l = 100 m a o n e c h a n n e l s w itc h in g a l l o th e r c h a n n e l s l o w t a = + 2 5 c p p m o d e p o w e r d i s s i p a t i o n v s . s w i t c h i n g f r e q u e n c y t oc 0 8 v d d = 2 4 v v d d = 3 0 v v d d = 3 6 v 0 . 0 0 . 2 0 . 4 0 . 6 0 . 8 1 . 0 1 . 2 1 . 4 0 . 0 1 0 . 1 1 1 0 1 0 0 p ow e r d i s s i p a ti o n ( w ) s w i tc h in g fr e q u e n c y ( kh z ) i l = 1 0 m a c l = 10n f o n e c h a n n e l s w itc h in g a l l o th e r c h a n n e l s l o w t a = + 2 5 c p p m o d e p o w e r d i s s i p a t i o n v s . s w i t c h i n g f r e q u e n cy w i t h r c l o a d t oc 1 0 v d d = 2 4 v v d d = 3 6 v v d d = 3 0 v 0 . 0 2 0 .0 4 0 .0 6 0 .0 8 0 .0 1 0 0 .0 1 2 0 .0 1 4 0 .0 1 6 0 .0 1 8 0 .0 2 0 0 .0 0 . 0 1 0 . 1 1 1 0 1 0 0 p ow e r d i s s i p a ti o n ( m w ) s w i tc h in g fr e q u e n c y ( kh z ) i l = 1 0 m a c l = 1 n f o n e c h a n n e l s w itc h in g a l l o th e r c h a n n e l s l o w t a = + 2 5 c p p m o d e p o w e r d i s s i p a t i o n v s . s w i t c h i n g f r e q u e n cy w i t h r c l o a d t oc 1 2 v d d = 2 4 v v d d = 3 6 v v d d = 3 0 v 0 1 0 2 0 3 0 4 0 5 0 6 0 7 0 8 0 9 0 0 . 0 1 0 . 1 1 1 0 1 0 0 p ow e r d i s s i p a t i on ( m w ) s w i tc h in g fr e q u e n c y ( kh z ) i l = 100 m a o n e c h a n n e l s w itc h in g a l l o th e r c h a n n e l s l o w t a = + 8 5 c p p m o d e p o w e r d i s s i p a t i o n v s . s w i t c h i n g f r e q u e n c y t oc 0 9 v d d = 2 4 v v d d = 3 0 v v d d = 3 6 v 0 . 0 0 . 2 0 . 4 0 . 6 0 . 8 1 . 0 1 . 2 1 . 4 1 . 6 0 . 0 1 0 . 1 1 1 0 1 0 0 p ow e r d i s s i p a ti o n ( w ) s w i tc h in g fr e q u e n c y ( kh z ) p p m o d e p o w e r d i s s i p a t i o n v s . s w i t c h i n g f r e q u e n cy w i t h r c l o a d t oc 1 1 v d d = 2 4 v v d d = 3 6 v v d d = 3 0 v i l = 1 0 m a c l = 10n f o n e c h a n n e l s w itc h in g a l l o th e r c h a n n e l s l o w t a = + 8 5 c 0 . 0 2 0 .0 4 0 .0 6 0 .0 8 0 .0 1 0 0 .0 1 2 0 .0 1 4 0 .0 1 6 0 .0 1 8 0 .0 2 0 0 .0 0 . 0 1 0 . 1 1 1 0 1 0 0 p ow e r d i s s i p a ti o n ( m w ) s w i tc h in g fr e q u e n c y ( kh z ) p p m o d e p o w e r d i s s i p a t i o n v s . s w i t c h i n g f r e q u e n cy w i t h r c l o a d t oc 1 3 v d d = 2 4 v v d d = 3 6 v v d d = 3 0 v i l = 1 0 m a c l = 1 n f o n e c h a n n e l s w itc h in g a l l o th e r c h a n n e l s l o w t a = + 8 5 c typical operating characteristics (continued) (v dd = +24v, v 5 = v l = 5.0v, t a = +25c, unless otherwise noted.) MAX14900E octal, high-speed, industrial, high-side switch www.maximintegrated.com
maxim integrated 11 pin description pin confgurations pin name function 1 s16/in8 16-bit serial-select input/in8 input. in serial mode (srial = high), drive s16/in8 high to select 16-bit serial operation. drive s16/in8 low to select 8-bit serial operation. in parallel mode (srial = low), s16/in8 sets the o8 output on/off in high-side mode or high/low in push-pull mode. s16/in8 has an internal 200k? pulldown resistor. 2 cnfg/in7 confgure select input/in7 input. in serial mode (srial = high), drive cnfg/in7 high to select per- channel confguration over the serial interface. drive cnfg/in7 low to select setting the o_ outputs over the serial interface. in parallel mode (srial = low), cnfg/in7 sets the o7 output on/off in high-side mode or high/low in push-pull mode. cnfg/in7 has an internal 200k? pulldown resistor . 3 in6 in6 input. in parallel mode (srial = low), in6 sets the o6 output on/off in high-side mode or high/low in push-pull mode. in6 has an internal 200k? pulldown resistor. 4 in5 in5 input. in parallel mode (srial = low), in5 sets the o5 output on/off in high-side mode or high/low in push-pull mode. in5 has an internal 200k? pulldown resistor. 5 cs spi chip-select input. cs is the spi active-low chip select. cs has an internal 200k? pullup resistor. 6 clk serial-clock input. clk is the spi serial-clock input (up to 20mhz) and has an internal 200k? pulldown resistor. 7 sdi serial-data input. sdi is the spi serial-data input and has an internal 200k? pulldown resistor . 8 sdo serial-data output. sdo is the spi serial-data output. sdo has an internal 200k? pulldown resistor when cs is logic-high. tqfn 7 mm x 7 mm * connect ep to agnd . n . c . n . c . n . c . rext agnd fltr n . c . n . c . n . c . en v 5 n . c . in 6 in 5 cs clk sdi sdo cerr / in 4 ol / in 1 crc / in 3 in 2 cnfg / in 7 s 16 / in 8 1 2 3 4 5 6 7 8 9 10 11 12 36 35 34 33 32 31 30 29 28 27 26 25 o 2 v dd v dd pgnd pushpl v dd o 4 pgnd o 1 v dd v l v dd o 8 pgnd o 7 v dd v dd o 6 pgnd o 5 srial v dd fault qfn 7 mm x 7 mm o 3 t op view 48 47 46 45 44 43 42 41 40 39 38 37 13 14 15 16 17 18 19 20 21 22 23 24 + max 14900 e ep * 13 14 15 16 17 18 19 20 21 22 23 24 v l + v dd o 1 pgnd o 2 v dd v dd o 3 pgnd o 4 v dd pushpl 48 47 46 45 44 43 42 41 40 39 38 37 1 2 3 4 5 6 7 8 9 10 11 12 fault v dd o 8 pgnd o 7 v dd v dd o 6 pgnd o 5 v dd srial ol / in 1 in 2 crc / in 3 cerr / in 4 sdo sdi clk cs in 5 in 6 cnfg / in 7 s 16 / in 8 36 35 34 33 32 31 30 29 28 27 26 25 n . c . n . c . n . c . fltr agnd v 5 en rext n . c . n . c . n . c . n . c . max 14900 e ep * MAX14900E octal, high-speed, industrial, high-side switch www.maximintegrated.com
maxim integrated 12 pin description (continued) pin name function 9 cerr /in4 crc error detection output/in4 input. in serial mode (srial = high) with error checking enabled (crc/in3 = high), cerr /in4 is an active-low open-drain output that asserts when a crc error is detected on sdi data. in parallel mode (srial = low), cerr /in4 sets the o4 output on/off in high-side mode or high/low in push-pull mode. cerr /in4 has an internal 200k? pulldown resistor when srial = 0. 10 crc/in3 crc enable input/in3 input. in serial mode (srial = high), drive crc/in3 high to enable crc generation/error detection on spi data. in parallel mode (srial = low), crc/in3 sets the o3 output on/off in high-side mode or high/low in push-pull mode. crc/in3 has an internal 200k? pulldown resistor. 11 in2 in2 input. in parallel mode (srial = low), in2 sets the o2 output on/off in high-side mode or high/low in push-pull mode. in2 has an internal 200k? pulldown resistor. 12 ol/in1 open-load enable input/in1 input. in serial mode (srial = high), drive ol/in1 high to enable open-load detection on all eight o_ outputs that are confgured in high-side mode, overriding the serial confguration. drive ol/in1 low to disable open-load detection unless enabled by the serial interface. in parallel mode (srial = low), ol/in1 sets the o1 output on/off in high-side mode or high/low in push-pull mode. ol/in1 has a 200k? pulldown resistor that is always connected. 13 v l logic supply input. v l defnes the logic levels on all i/o logic interface pins from 2.5v to 5.5v . bypass v l to agnd with a 0.1f ceramic capacitor as close as possible to the device. 14, 18, 19, 23, 38, 42, 43, 47 v dd supply voltage input. v dd supply is 10v to 36v. bypass the v dd pins to a ground plane with a 1f ceramic capacitor. externally connect all v dd pins and ensure that the maximum trace resistance between each v dd pin is less than 10m?. 15 o1 driver output 1. may be confgured as a high-side switch or push-pull output. 16, 21, 40, 45 pgnd power ground. connect pgnd to the ground plane. 17 o2 driver output 2. may be confgured as a high-side switch or push-pull output. 20 o3 driver output 3. may be confgured as a high-side switch or push-pull output. 22 o4 driver output 4. may be confgured as a high-side switch or push-pull output. 24 pushpl global push-pull/high-side select input. in parallel mode (srial = low), drive pushpl high to globally confgure all o_ outputs to operate in push-pull mode, overriding the serial confguration. drive pushpl low to confgure all o_ outputs to operate in high-side mode unless confgured as push-pull by the serial interface. pushpl has an internal 200k? pulldown resistor. 25C27, 33C36 n.c. no connection. not internally connected. 28 fltr glitch filter enable input. set fltr high to enable glitch fltering on every logic input except sdi and clk. fltr has an internal 200k? pulldown resistor. 29 agnd analog ground. connect agnd to the ground plane. 30 v 5 5v supply input. bypass v 5 to agnd with a 1f ceramic capacitor as close as possible to the device. 31 en enable input. drive en high to enable normal operation for all o_ outputs. drive en low to force all o_ outputs into high-impedance mode. en has an internal 200k? pulldown resistor . 32 rext external resistor connection. connect a 56k? 1% resistor from rext to agnd. MAX14900E octal, high-speed, industrial, high-side switch www.maximintegrated.com
maxim integrated 13 pin description (continued) functional diagram pin name function 37 srial serial/parallel select input. drive srial high to set and confgure the o_ outputs through the serial interface. drive srial low to set the o_ outputs through the parallel (in_) pins. srial does not affect the read back of diagnostics/status information through the serial interface. srial has an internal 200k? pulldown resistor. 39 o5 driver output 5. may be confgured as a high-side switch or push-pull output. 41 o6 driver output 6. may be confgured as a high-side switch or push-pull output. 44 o7 driver output 7. may be confgured as a high-side switch or push-pull output. 46 o8 driver output 8. may be confgured as a high-side switch or push-pull output. 48 fault global fault output. fault is an open-drain, active-low output that asserts when a fault condition (thermal shutdown, open-load, and/or overload protection) is detected on any o_ output. ep exposed pad. connect ep to a large ground plane, which is electrically connected to pgnd, using a via farm to minimize thermal impedance; not intended as an electrical connection point. s16/in8 pgnd paralle l interfac e ol /in1 in2 crc/in 3 cerr /in4 srial in5 in6 cnfg/in7 o2 o1 fault overload open load seria l interfac e sdi clk cs sdo diagnostic s drive + monitor o8 o8 en o7 drive + monitor en o6 drive + monitor en o5 drive + monitor en o4 drive + monitor en o3 drive + monitor en drive + monitor drive + monitor pushpl v 5 fltr uv monitor v dd v dd config and setting overtemp agnd v l v 5 v l v dd rext en MAX14900E v dd v dd v dd v dd v dd v dd v dd o7 o5 o3 o1 o6 o4 o2 MAX14900E octal, high-speed, industrial, high-side switch www.maximintegrated.com
maxim integrated 14 detailed description the MAX14900E is an octal low-propagation delay 850ma high-side switch that can be operated as a push- pull driver with high switching-rate capability. each chan - nel can be configured to operate in high-side or push-pull mode. push-pull mode drives capacitive loads such as long cables that need to be driven at high switching rates. in high-side mode, each channel switches up to 850ma load current with 165m (max) on-resistance. the MAX14900Es switches/drivers are configured either individually by a serial spi interface and/or glob - ally by a parallel interface. in parallel operating mode (srial = low), the in_ inputs directly control the o_ outputs and the spi interface configures each channel and reads back diagnostic and state status. in serial operating mode (srial = high), the spi interface is used to configure and set the state of each channel while the parallel inputs provide optional configuration possibilities. current limiting, overload protection, and thermal shutdown circuitry protect each switch/driver. the device features per-channel diagnostic detection that feeds back per-channel thermal shutdown and output state information. in high-side mode, multiple channels can be connected in parallel to achieve higher load currents. serial/parallel operating modes a serial spi and parallel interface allow configuration, monitoring, and driving of the MAX14900E. the serial interface supports per-channel configuration, setting, and diagnostics/monitoring while the parallel interface allows direct driving of the switches/outputs. table 1 details how the device utilizes each interface depending on the status of the configuration select inputs. parallel operating mode in parallel operating mode (srial = low), the eight in_ inputs directly set the o_ switches on/off in high-side mode or high/low in push-pull mode ( table 2 ). the serial interface can optionally be used to configure each output as a high-side switch or as a push-pull driver and to enable open-load detection for each high-side switch. the serial interface can also be used in parallel mode to read out per-channel fault, open-load detection, and output logic state information. the outputs can be configured globally for push-pull oper - ation by the pushpl input. global diagnostic fault and open-load information is reported by the fault output. serial operating mode in serial operating mode (srial = high), the switches/ drivers are set, configured, and monitored by the spi interface. the s16/in8, cnfg/in7, crc/in3, and ol/in1 inputs and the cerr /in4 output provide further configu - ration and monitoring options in serial operating mode. the remaining in_ inputs are not used. see the serial controller interface section for more information. table 1. serial/parallel operating modes x = dont care table 2. parallel driving truth table operating mode srial s16/in8 cnfg/ in7 sdi data sdo data setting config fault status parallel mode with optional spi confguration, diagnostics, and monitoring 0 x x n/a 16-bit 8-bit 8-bit 8-bit serial mode with spi setting and diagnostics 1 0 0 8-bit n/a 8-bit n/a 8-bit serial mode with spi confguration and diagnostics 1 0 1 n/a 8-bit 8-bit n/a 16-bit serial mode with spi setting, confguration, diagnostics, and monitoring 1 1 0 8-bit 8-bit 8-bit 8-bit 16-bit serial mode with spi confguration, diagnostics, and monitoring 1 1 1 n/a 16-bit 8-bit 8-bit in_ o_ state push-pull high-side 0 low off 1 high on MAX14900E octal, high-speed, industrial, high-side switch www.maximintegrated.com
maxim integrated 15 confguration the global configuration inputs affect all eight o_ channels while serial configuration is per channel. see table 3 . the serial interface can be used to configure each output individually to be in push-pull or high-side mode and to enable open-load detection for that channel if it is in high- side mode. the pushpl and ol/in1 inputs override the per-channel serial configuration when they are set high. output drivers the drivers can be configured for high-side or push-pull operation. when configured in high-side mode, each driver can safely source 850ma (max) load current continuously. the high-side switches have active current limiting in the range between 1.4a (min) and 2.0a (max). when a driver is in push-pull mode, the output drives resistive/capacitive loads at high switching rates with load currents up to 100ma to ground. the r on is 4 (max) for the high-side and 10 (max) for the low-side drivers in push-pull mode. monitoring the output logic state the voltage state of each o_ driver/switch can be read out via spi. if the voltage on an o_ output is higher than the 7v (typ) threshold, then the corresponding s_ bit is logic 1 in the status byte. if the voltage on an o_ output is below the threshold, then the corresponding s_ bit is logic 0. status monitoring can be read out via 16-bit serial mode. this is possible on all modes and states of the outputs: on/off/high/low. open-load detection when configured in high-side mode, the device can detect when no load is connected to the o_ outputs or when a wire to a load is open circuit. open-load detection can be globally enabled in serial mode via the ol/in1 input, or on a per-channel basis via the serial interface in parallel and serial modes. the detection circuitry applies an 80a current to the load and monitors the o_ voltage. open- load detection occurs when the outputs are configured in high-side mode and is active while the high-side driver is off. when an open-load condition is detected on a high-side switch, the corresponding switchs fault bit is set and the global fault output is asserted. turning off a high-side driver that has a large capacitive load and low bleed resistance triggers a temporary detection of an open-load condition and assert fault until the o_ voltage decays to below the 7v (typ) threshold. table 3. global configuration inputs x = dont care input srial configuration function fltr x enables anti-glitch fltering on all logic input pins except sdi and clk 0 = glitch fltering disabled 1 = glitch fltering enabled pushpl x confgures all o_ outputs as push-pull or high-side 0 = all drivers high-side mode unless confgured as push-pull by serial interface 1 = all drivers push-pull mode en x enables normal operation of all o_ outputs 0 = all o_ outputs high impedance 1 = normal operation ol/in1 1 enables global open-load detection in serial mode 0 = open-load detection disabled unless enabled by serial interface 1 = open-load detection enabled for all high-side mode switches crc/in3 1 enables crc generation and error detection of spi data 0 = crc disabled 1 = crc enabled MAX14900E octal, high-speed, industrial, high-side switch www.maximintegrated.com
maxim integrated 16 thermal shutdown protection thermal overload circuitry constantly monitors each switch/driver and a global thermal shutdown circuit monitors average chip temperature. when a local thermal shutdown condition occurs for one of the drivers, it is disabled while the others continue to operate. when the local temperature falls to below the activation thresh - old (t c_sd C t c_sd_hys ), that driver automatically re-enables. a global thermal shutdown does not disable the o_ outputs but prevents any channel from re-enabling itself until the global temperature sensor is below the limit. the fault output is asserted when any thermal shut - down condition occurs. in addition, f_ bits are set for channels that are in thermal shutdown in the spi sdo data. overload and short-circuit protection the device protects each o_ output against overload and short-circuit conditions while operating in push-pull and high-side mode. in high-side mode, the device actively limits each chan - nels output current to 1.7a. as long as no thermal shutdown occurs, this current limiting condition persists continuously. in push-pull mode, the device limits the load current to 300ma/500ma (typ). overload faults are detected when an o_ output is in push-pull mode and an overcurrent condition forces the output voltage to above 1v (for o_ = low) or below (v dd - 1v) (for o_ = high) for more than the blanking time 90s (typ). when the cause of the output voltage level mismatch is removed, the driver resumes normal operation. por and uvlo conditions the MAX14900E features undervoltage lockout (uvlo) and power-on reset (por) circuitry on its power supply inputs to ensure that the device is in a known state on power-up or when there is a droop on one of the supplies. if either v l or v 5 falls to below its por threshold, the device goes into its reset state and all configuration settings are lost. when v dd or v 5 is below its uvlo threshold, all o_ outputs are disabled and the 80a open-load detection current sources are turned off. the device resumes nor - mal operation when the uvlo condition is removed. as long as v l and v 5 stay above their por thresholds, the spi interface remains active and configuration settings are not affected. in 16-bit serial mode when a uvlo is present, a series of all ones in the serial sdo status/fault read back bits reports this condition. fault output the global fault output asserts when a fault condition is detected on any o_ output. the types of fault conditions reported by fault are thermal shutdown, open-load (if enabled), and overload protection (in push-pull mode only). the global fault is not initiated in a uvlo condition. thermal shutdown faults are detected when the internal temperature of any driver exceeds the thermal shutdown threshold (t c_sd ). the fault is cleared when the temperature falls to below the activation threshold (t c_sd C t c_sd_hys ). open-load faults are detected when the voltage at an o_ output in high-side mode with the hs switch turned off is above the detection threshold of 7v. this happens when the o_ output is not connected to any external load and the 80a pullup current charges the node. a brief open- load condition can occur after an hs switch is turned off and the load has not discharged capacitance yet. in push-pull mode, if the voltage level at an o_ output dif - fers from the programmed value for longer than the 90s (typ) blanking time due to overcurrent, the driver is turned off for the 11ms (typ) retry time. during the retry period, the fault output is asserted and the fault bit is set for that driver in the serial data. the fault is cleared after the fault condition is removed at the end of the current retry period (11ms). MAX14900E octal, high-speed, industrial, high-side switch www.maximintegrated.com
maxim integrated 17 serial controller interface the MAX14900E can be configured, controlled and/or monitored on a per-channel basis via its spi interface (see table 1 ). daisy-chaining multiple MAX14900E devices is supported to reduce the required number of cs and/ or isolator pins. figure 5 shows an example of daisy- chaining two MAX14900E devices. daisy-chaining operates both with 8-bit and 16-bit serial data: s16/in8 = x. the MAX14900E uses spi mode 0 with cpol = 0 and cpha = 0. when the cs input transitions low, diagnostics and status information is sampled and stored in the inter - nal spi shift register and the sdo output becomes active. this data is clocked out of sdo on each falling clk edge while new sdi data is sampled and stored in the shift register on each rising clk edge. when cs transitions high at the end of the spi cycle, the current data in the spi shift register is latched into the MAX14900E and the new configuration and/or setting data changes the driver states. figure 6 illustrates the sampling of internal signals dependent on cs transitions. figure 5. daisy-chained MAX14900E devices with 8-bit serial mode figure 6. internal sampling events timing diagram s h i f t r e g d a t a b i t s d i a g n s t c max14900 em ax14900 e sdi sdo clk s h i f t r e g d a t a b i t s d i a g n s t c sdi sd o clk cs sclk mosi miso cs c cs cs diagnostic s /statu s output latche d new stat e previous stat e MAX14900E octal, high-speed, industrial, high-side switch www.maximintegrated.com
maxim integrated 18 8-bit serial mode with setting and monitoring in serial mode with 8-bit setting and 8-bit monitoring (srial = high, s16/in8 = low, cnfg/in7 = low), the spi shift register is 8 bits long ( figure 7 ). the do_ bits set the state of the respective o_ output ( table 4 ). the f_ bits report fault information of the respective o_ output ( table 7 ). 8-bit serial mode with confguration and monitoring in serial mode with 8-bit configuration and 8-bit monitor - ing (srial = high, s16/in8 = low, cnfg/in7 = high), the spi shift register is 8 bits long ( figure 8 ). the c_ bits configure push-pull/high-side mode for the respective o_ output ( table 5 ). the f_ bits report fault information for the respective o_ output ( table 7 ). figure 7. serial timing in 8-bit setting serial mode figure 8. serial timing in 8-bit configuration serial mode cs clk sdi sdo do8d o7 do6d o5 do4d o3 do2d o1 f8 f7 f6 f5 f4 f3 f2 f1 hi-z cs clk sdi sdo c8 c7 c6 c5 c4 c3 c2 c1 f8 f7 f6 f5 f4 f3 f2 f1 hi-z MAX14900E octal, high-speed, industrial, high-side switch www.maximintegrated.com
maxim integrated 19 figure 9. 16-bit serial timing with 8-bit setting/8-bit configuration figure 10. 16-bit serial timing with 16-bit configuration 16-bit serial mode with 8-bit setting/8-bit confguration in serial mode with 8-bit setting/8-bit configuration and 16-bit monitoring (srial = high, s16/in8 = high, cnfg/ in7 = low), the spi shift register is 16 bits long ( figure 9 ). the do_ bits set the state of the respective o_ output and the c_ bits configure push-pull/high-side mode ( table 4 and table 5 ). the f_ and s_ bits report the status informa - tion for each channel ( table 8 ). parallel mode/16-bit serial mode with 16-bit confguration in parallel and serial mode with 16-bit serial configuration and 16-bit monitoring (srial = low or srial = high, s16/ in8 = high, cnfg/in7 = high), the spi shift register is 16 bits long ( figure 10 ). the c1_ and c0_ bits configure push-pull/high-side mode and open-load detection for each respective channel ( table 6 ). the f_ and s_ bits report the status information for each channel ( table 8 ). setting, confguration, and monitor bit defnitions table 3 to table 8 define the effects of the setting, configu - ration, and monitoring bits. if pushpl = high, then all outputs are configured as push-pull mode regardless of c_. table 4. serial setting truth table table 5. 8-bit serial configuration truth table do_ o_ state push-pull operation high-side operation 0 low off 1 high on c_ o_ configuration 0 high-side mode 1 push-pull mode cs clk sdi sdo do8d o7 do6d o5 do4d o3 do2d o1 f8 f7 f6 f5 f4 f3 f2 f1 hi -z c8 c7 c6 c5 c4 c3 c2 c1 s8 s7 s6 s5 s4 s3 s2 s1 clk sdi sdo c18c 17 c16c 15 c14c 13 c12 c11 c08 c07 c06 c05 c04 c03 c02 c01 f8 f7 f6 f5 f4 f3 f2 f1 s8 s7 s6 s5 s4 s3 s2 s1 hi-z cs MAX14900E octal, high-speed, industrial, high-side switch www.maximintegrated.com
maxim integrated 20 figure 11. crc check byte expected from controller figure 12. crc check byte sent by MAX14900E 16-bit serial confguration open-load detection is only available for outputs con - figured in high-side mode. if pushpl = high, then all outputs are configured as push-pull mode regardless of the c_ bits. in serial modes, if ol/in1 = high, then all out - puts that are configured as high side will have open-load detect on, regardless of the c1_ bits. 8-bit serial diagnostics if a driver is configured in push-pull mode, then a fault means that an overload or a thermal shutdown is pres - ent on that channel. if the driver is configured in high- side mode, then a fault means that an overtemperature condition is detected. if open-load detection is enabled in high-side mode, then the f_ bit is set when either an open-load (only possible with the high-side switch off) or an overtemperature is detected. in a uvlo condition, eight f_ bits are logic one. 16-bit serial diagnostics logic-level status (s_bits) detection is only valid when no fault is present. each s_ bit in normal (no fault) operating condition reports whether or not the o_ voltage is above (= 1) or below (= 0) 7v (typ). when all f_ and s_ bits are logic one, a uvlo condition is present. crc error checking on serial interface in serial mode (srial = high), crc error detection can be enabled by setting crc/in3 high to minimize incorrect operation due to noise on the sdi/sdo/clk signals. with crc error detection enabled, the MAX14900E detects errors on the sdi data that it receives from the controller and it calculates a crc on the sdo data that it sends to the controller and appends this check byte to the sdo data. this ensures that both the spi data sent and received by the MAX14900E has a low likelihood of undetected errors. the check byte appended to all 8-bit/16-bit sdo data by the MAX14900E contains a 7-bit frame check sequence (fcs). this fcs is based on the crc generator polyno - mial x 7 + x 5 + x 4 + x 2 + x + 1. the crc initialization condi - tion is 0x7f. the MAX14900E in turn expects a check byte appended to all 8-/16-bit sdi data that it receives contain - ing a fcs based on the same polynomial ( figure 11 ). the controller should calculate the 7 fcs bits (cri_) on the 8-/16-bit data including the logic 1 in the first position of the check byte. thus the crc is calculated on 9 or 17 bits. cri1 is the lsb of the fcs. the MAX14900E veri - fies this received crc. if the MAX14900E detects crc errors on the received sdi data, then it ignores this data and does not change its configuration and/or output set - ting. instead, the cerr /in4 output is asserted and the err bit is set in the check byte that it appends to the 8-/16-bit sdo diagnostic/status data that it sends back to the controller during the following serial communication cycle ( figure 12 ). err is the error feedback bit that is sent back to the controller to signal that a crc error was detected on the table 6. 16-bit serial configuration truth table table 7. 8-bit diagnostics truth table table 8. 16-bit serial diagnostics truth table c1_ c0_ o_ configuration 0 0 high-side mode, open-load detect off 0 1 push-pull mode 1 0 high-side mode, open-load detect on 1 1 push-pull mode f_ o_ condition 0 no fault present 1 fault (overload, open load, or uvlo) present f_ s_ o_ status 0 0 no fault detected, logic state of o_ is low 0 1 no fault detected, logic state of o_ is high 1 0 fault detected, logic state not defned 1 1 uvlo detected cs clk sdi1 cri7 cri6 cri5c ri4c ri3c ri2c ri1 cs clk sdo err cro7 cro6 cro5c ro4c ro3c ro2c ro1 hi-z MAX14900E octal, high-speed, industrial, high-side switch www.maximintegrated.com
maxim integrated 21 previous sdi data reception. note that err is delayed by one spi cycle, i.e., it indicates that a crc error was detected in the previous spi data cycle. the cerr /in4 output is immediately set active when a crc error is detected, allowing the controller to resend the last sdi data or take other action. the cro_ bits are the crc bits that the MAX14900E calculates on the 8-/16-bit diagnostics and/or status data plus the err bit i.e., the output fcs is calculated on 9/17 bits. this allows the controller to detect errors on the sdo data received from the MAX14900E. applications information driving inductive loads in high-side mode, when the high-side switch turns off, an inductive load will cause the o_ voltage to swing negative in order to continue sourcing the loads inductive current while the inductor field collapses. the internal diodes sup - port turn-off of inductive loads of up to 1.5h and currents of up to 1.9a. driving lamp loads lamp loads are incandescent lamps where the filament resistance is strongly dependent on the filaments tem - perature. the initial startup current is high because a cold filament has a very low resistance. the MAX14900E will reliably turn on 15w lamps over the operating tempera - ture range. driving capacitive loads when charging/discharging purely capacitive loads with a push-pull driver, the driver dissipates power that is propor - tional to switching frequency. the power can be estimated by p d ~ c x v dd 2 x f , where c is the load capacitance, v dd is the supply voltage, and f is the switching fre - quency. for example, in an application with a 1nf load and 100khz switching frequency, each driver dissipates 130mw at v dd = 36v. when driving purely capacitive loads consider a maximum capacitance of around 10nf. multiple spi devices on shared bus the sdo output is high impedance when cs is logic- high to allow connecting multiple devices in parallel on a shared spi bus with the sdo lines connected together. when sdo is high impedance, an internal 200k pull - down resistor is enabled to pull sdo to gnd weakly. paralleling of outputs in high-side mode, multiple outputs can be connected together in parallel to achieve higher load currents. the total load current should be shared equally between these high-side switches that are operated in parallel. this is achieved by having identical trace resistances for all the pcb tracks from the o_ pins to the common star connection point. this is particularly important, since the on-resistance of each high-side switch is low: 85m (typ). board layout high-speed switches require proper layout and design procedures for optimum performance. ensure that power- supply bypass capacitors are placed as close as possible to the device. connect all v dd pins to a v dd plane. ensure that all v dd pins have no more than 10m between them. in this case a 1f capacitor should be placed to the ground plane as close to the v dd pins as possible. in the case low resistance paths are not pos - sible between the v dd pins, bypass each pin to gnd via a 100nf capacitor. a suppressor/tvs diode should be used between v dd and gnd to clamp high-surge transients on the v dd sup - ply input and surges from the o_ outputs. the standoff voltage should be higher than the maximum operating voltage of the equipment while the breakdown voltage should be around 40v. as long field supply cables can generate large voltage transients on the v dd supply due to large di/dt, it is rec - ommended to add a large capacitor on v dd at the point of field supply entry. capacitance should be as large as possible, but 47f electrolytic capacitor is recommended as a minimum. high esd protection electrostatic discharge (esd)-protection structures are incorporated on all pins to protect against electrostatic discharges up to 2kv human body model (hbm) encountered during handling and assembly. all o_ outputs are further protected against esd up to 15kv (hbm) without damage, when the part is operative in the application circuit with a 1f bypass capacitor on v dd and a suppressor/tvs diode. in order to achieve even higher esd levels, connect external diodes from each output to gnd and to v dd as described in the surge protection section. surge protection the MAX14900E o_ pin is tolerant to 600v/(42 + 0.5f) 1.2s/50s surge testing, when only using a tvs diode on v dd and without protection diodes on the o_ pins. it achieved over 1.5kv/(42 + 0.5f) iec61000- 4-5 surge testing when using the typical operating circuit . the silicon diodes on o_ must have low forward voltage diodes that support the surge currents, like mura205t3g. a surge-suppressor diode on the v dd supply must have low output impedance at the high surge currents. the sm30ty is suitable for this. place all diodes and the v dd capacitor as close to the MAX14900E pins as possible. MAX14900E octal, high-speed, industrial, high-side switch www.maximintegrated.com
maxim integrated 22 typical operating circuit max14850 MAX14900E MAX14900E step-down max15062 56k o1 srial 24v 24v 47f 01 v l 5v v 5 en v ddb v dda v dda 3.3v gndb gnda fa ul t clk sdi cnfg sdo rext agnd pushpl pgnd v dd v dd o2 24v 02 o3 24v 03 o4 24v 04 o5 24v 05 o6 24v 06 o7 24v 07 o8 24v 08 fa ul t cs 36v tvs 1f 10k 56k o1 srial en 24v 24v 24v 5v 1f 09 sdi clk cnfg sdo rext agnd pushpl pgnd o2 24v 10 o3 24v 11 o4 24v 12 o5 24v 13 o6 24v 14 o7 24v 15 o8 24v 16 cs 36v tvs v l v 5 gnd spi gpio controller isolat ion 100nf MAX14900E octal, high-speed, industrial, high-side switch www.maximintegrated.com
maxim integrated 23 chip information process: bicmos +denotes a lead(pb)-free/rohs-compliant package. t =tape and reel. **ep = exposed pad. ordering information part temp range (c) pin- package MAX14900Eagm+ckt -40 to +125 48 qfn-ep** MAX14900Eagm+tckt -40 to +125 48 qfn-ep** MAX14900Eagm+ckh -40 to +125 48 tqfn-ep** MAX14900Eagm+tckh -40 to +125 48 tqfn-ep** MAX14900E octal, high-speed, industrial, high-side switch www.maximintegrated.com
maxim integrated 24 package information for the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. package type package code outline no. land pattern no. 48 qfn k4877+1 21-100009 90-100003 48 tqfn t4877+6 21-0144 90-0130 MAX14900E octal, high-speed, industrial, high-side switch www.maximintegrated.com
maxim integrated 25 package information for the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. MAX14900E octal, high-speed, industrial, high-side switch www.maximintegrated.com
maxim integrated 26 package information for the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. MAX14900E octal, high-speed, industrial, high-side switch www.maximintegrated.com
maxim integrated 27 package information for the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. MAX14900E octal, high-speed, industrial, high-side switch www.maximintegrated.com
maxim integrated 28 package information for the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. MAX14900E octal, high-speed, industrial, high-side switch www.maximintegrated.com
maxim integrated 29 package information for the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. MAX14900E octal, high-speed, industrial, high-side switch www.maximintegrated.com
maxim integrated 30 package information for the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. MAX14900E octal, high-speed, industrial, high-side switch www.maximintegrated.com
? 2015 maxim integrated products, inc. 31 revision history revision number revision date description pages changed 0 3/13 initial release 1 6/14 added new features 1, 4, 5, 7, 9, 10, 12, 14, 15, 17-21 2 11/14 changed current limit and added tqfn package option 1C3, 13, 16, 20C23 3 1/15 updated general description , benefts and features , ordering information , and package information sections 1, 23-30 4 4/15 updated functional diagram and maximum power dissipation in the absolute maximum ratings section, corrected mislabeled axis and symbols in typical operating characteristics , and added the paralleling of outputs section under applications information 1-2, 4, 10-11, 13, 15-18, 21 maxim integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim integrated product. no circuit patent licenses are implied. maxim integrated reserves the right to change the circuitry and specifcations without notice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. maxim integrated and the maxim integrated logo are trademarks of maxim integrated products, inc. MAX14900E octal, high-speed, industrial, high-side switch for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim integrateds website at www.maximintegrated.com.

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